Edumund, thanks for your lucid explanation!
I actually design chips for a living, but I work at the gate level, so I don't get much into yield issues.
I think you more-or-less confirmed what I was saying--medium format sensor cost doesn't improve from the Moore's Law-related density improvements. I agree with you that improvements in defect densities will help out sensor costs. That is of course a much slower improvement rate than the 2x every 2-3 years of Moore's Law.
It's not clear to me how much the defect density plays into the cost of these sensors, because my impression is that they map out bad pixels. So, unlike a memory chip or a processor, camera sensors can tolerate multiple defects on the device. So it is conceiveable that the yield is already quite high. Or perhaps not--I haven't seen that anybody's giving out any yield data.
I have read that the reason for the current size of 645 sensors is that they are fabricating them on 150mm wafers, and this is the biggest they can make them and still fit 4 die on a wafer. I'm not sure that makes sense, though. The diagonal of the active area of a 48x36 sensor is 60mm. That would leave 15mm for support circuits and pads, which seems like a huge amount. A standard 645 frame has a 70mm diagonal, which would leave 5mm. Offhand, it seems like that could be made to work; at the least, it would seem that they could get a lot closer to full 645.
If they really are limited to a 60mm diagonal on a 150mm wafer, then we aren't likely to see anything bigger until they make a technology change. Which, given the size of the market and the target costs, probably means waiting for hand-me-down 200mm or 300mm processing equipment.
I also note in passing that 150mm technology is way, way off the Moore's Law curve.